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december 2010 doc id 18306 rev 1 1/26 26 STA540SAN 4 x 10-watt dual/quad power amplifier features ? high output-power capability: ?4 x 9w / 2 ? at 12 v, 1 khz, 10% ? 4 x 10 w / 4 ? at 17 v, 1 khz, 10% ? 2 x 26 w / 4 ? at 14.4 v, 1 khz, 10% ? 2 x 15 w / 8 ? at 16 v, 1 khz, 10% ? minimum external component count: ? no bootstrap capacitors ? no boucherot cells ? internally fixed gain of 20 db ? standby function (cmos compatible) ? no audible pop during standby operations ? diagnostic facilities: ? clip detector ? out to gnd short circuit ? out to vs short circuit ? soft short at turn-on ? thermal shutdown proximity ? protection for ? output ac/dc short circuit ? soft short circuit at turn-on ? thermal cut-off limiter to prevent chip from overheating ? high inductive loads ? esd description the STA540SAN contains four single-ended, class-ab audio amplifiers assembled in a clipwatt15 package. these amplifiers are used for high-quality sound applications. each amp lifier has integrated short-circuit and thermal protection and diagnostic functions. two amplifiers can be paired up for applications requiring high power output. clipwatt15 table 1. device summary order code temperature range package packaging STA540SAN -40 to 150 c clipwatt15 tube www.st.com
contents STA540SAN 2/26 doc id 18306 rev 1 contents 1 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3.2 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3.3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4 test and applications bo ard . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 5 standard applications circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 6 electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 7 thermal information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 8 general structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 8.1 high application flexibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 8.2 easy single-ended to bridge transition . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 8.3 internally fixed gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 8.4 silent turn on/off and muting/standby functions . . . . . . . . . . . . . . . . . . . . 18 8.5 standby driving (pin 7) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 8.6 output stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 8.6.1 rail-to-rail output voltage swing with no need of bootstrap capacitors . 19 8.6.2 absolute stability without any external compensation . . . . . . . . . . . . . . 19 8.7 short-circuit protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 8.7.1 diagnostic facilities (pin 10) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 8.7.2 thermal shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 8.8 handling of the diagnostic information . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 8.9 pcb-layout grounding (general rules) . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 8.10 mute function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 9 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
STA540SAN contents doc id 18306 rev 1 3/26 10 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
block diagram STA540SAN 4/26 doc id 18306 rev 1 1 block diagram figure 1. block diagram 13 1 + - + - + - + - in1 vcc2 vcc1 out1 4 st_by svr p_gnd s_gnd 7 in2 5 in3 12 in4 11 out2 out3 out4 d06au1630_bc diagnostic output 2 15 14 10 3 689 a1 a2 inv a3 a4 inv
STA540SAN pin description doc id 18306 rev 1 5/26 2 pin description figure 2. pin connection (top view) table 2. pin description pin name type function 1 out1 output channel 1 output 2 out2 output channel 2 output 3 vcc1 power power supply 4 in1 input channel 1 input 5 in2 input channel 2 input 6 svr input supply voltage rejection 7 st_by input standby control pin 8 p_gnd power power ground 9 s_gnd power signal ground 10 diag output diagnostics 11 in4 input channel 4 input 12 in3 input channel 3 input 13 vcc2 power power supply 14 out4 output channel 4 output 15 out3 output channel 3 output 1 2 3 4 5 6 7 9 10 11 8 in4 diag s_gnd p_gnd st_by svr in2 in1 vcc1 out2 out1 13 14 15 12 out3 out4 vcc2 in3 clp15_pins_540san_bc
electrical specifications STA540SAN 6/26 doc id 18306 rev 1 3 electrical specifications 3.1 absolute maximum ratings 3.2 thermal data 3.3 electrical characteristics the results in table 5 below were measured under the conditions v s = 15 v, r l = 4 ? , f = 1 khz and t amb = 25 c unless otherwise specified. refer also to the test circuit in figure 3 on page 8 table 3. absolute maximum ratings symbol parameter value unit v smax supply voltage idle mode (no signal) 24 v supply voltage operating 22 v supply voltage ac-dc short safe 20 v v st_bymax voltage on pin st_by v smax - p tot total power dissipation (t case = 70 c) 35 w t stg , t j storage and junction temperature -40 to150 c t op operating temperature 0 to 70 c table 4. thermal data symbol parameter min typ max unit r th j-case thermal resistance junc tion to case - - 2.5 c/w r th j-amb thermal resistance junction to ambient - - 45 c/w table 5. electrical characteristics symbol parameter test condition min typ max unit v s supply voltage range - 8 - 22 v i d total quiescent drain current - - 80 150 ma v os output offset voltage - -250 - 250 mv p o output power thd = 10% 6.5 7.5 - w thd = 10%, v s = 17 v s.e. r l = 4 ? -10-w thd = 10%, v s = 17 v btl, r l = 8 ? -20-w thd distortion r l = 4 ? , p o = 0.1 to 4 w - 0.02 - % i sc short-circuit current - - 3.5 - a
STA540SAN electrical specifications doc id 18306 rev 1 7/26 c t crosstalk f = 1 khz f = 10 khz - 70 60 -db r in input impedance - 20 30 - k ? g v voltage gain - 192021db g v voltage gain match - - - 0.5 db e n total output noise rg = 0, ?a? weighted inverting channels: non-inverting channels: - - 50 20 - - v svr supply voltage rejection rg = 0, f = 300 hz, c svr = 470 f 50--db a sb standby attenuation - 80 90 - db i sb st_by current consumption v st_by = 0 to 1.5 v - - 100 a v sb st_by in threshold voltage - - - 1.5 v v sb st_by out threshold voltage - 3.5--v i st_by st_by pin current play mode v st_by = 5 v - - 50 a driving current under fault - - 5 ma i cd off clipping detector output average current thd = 1% (1) -90- a i cd on clipping detector output average current thd = 5% (1) - 160 - a v diag voltage saturation on diag sink current on pin diag i diag = 1 ma --0.7v t w thermal warning - - 140 - c t m thermal muting - - 150 - c t s thermal shutdown - - 160 - c 1. pin diag pulled-up to 5 v with 10 k ? table 5. electrical characteristics (continued) symbol parameter test condition min typ max unit
test and applications board STA540SAN 8/26 doc id 18306 rev 1 4 test and applications board this chapter includes information about the test and applications board including the test circuit, board layout, and parts lis t. figure 3. test circuit jp1, jp2 : open = s e clo s ed = btl jp 3 , jp4 : open = s e clo s ed = btl 4 in1 5 in2 12 in 3 11 in4 6 s vr 8 p_gnd 9 s _gnd 14 out4 15 out 3 2 out2 1 out1 3 vcc1 7 s t-by 10 diag 1 3 vcc2 ic1 s ta540 s an clipwatt15 c5 1000 f 50 v c6 100 nf 25 v r1 10k r2 1k 8 c7 2200 f, 25 v c9 2200 f, 25 v c10 2200 f, 25 v c 8 2200 f, 25 v jp1 jumper2x1(dip) jp2 jumper2x1(dip) jp 3 jumper2x1(dip) jp4 jumper2x1(dip) c1 0.22 u f c2 0.22 u f c 3 0.22 u f c4 0.22 u f jp6 jumper2x1(dip) jp5 jumper2x1(dip) c11 47 f 25 v c12 10 f 25 v 1 3 2 s w1 s lid s witch-2.54- 3 p tp tp1 1 2 3 4 5 6 cn1 rca4ch_6p c1 3 100 nf zd1 do7 1 2 cn7 cn-5-02p 1 2 cn 3 cn-5-02p 1 2 cn4 cn-5-02p 1 2 cn5 cn-5-02p 1 2 cn6 cn-5-02p vcc pgnd s gnd s gnd s gnd s gnd s gnd vcc vcc pgnd pgnd pgnd pgnd pgnd pgnd di a gno s tic s in1 in2 in 3 in4 s gnd s gnd
STA540SAN test and applications board doc id 18306 rev 1 9/26 figure 4. component layout figure 5. component side figure 6. solder side
test and applications board STA540SAN 10/26 doc id 18306 rev 1 table 6. list of components components suggested value purpose r1 10 k ? standby time constant r2 1.8 k ? ripple rejection c1, c2, c3, c4 0.22 f input ac coupling c5 0.1 f voltage supply decoupling c6 1000 f voltage supply decoupling c7, c8, c9, c10 2200 f output ac coupling c11 47 f ripple rejection c12 10 f standby time constant c13 100 nf ripple rejection zd1 10 f standby time constant
STA540SAN standard applications circuits doc id 18306 rev 1 11/26 5 standard applications circuits figure 7. quad stereo figure 8. audio performance option the best audio performance is obtained with the configuration where each speaker has its own dc blocking capacitor. if the application allo ws a little degradation of the spatial image it is possible to connect a couple of speakers wi th only one low-value dc blocking capacitor. figure 9. double bridge a dedicated evaluation board is available for this application (see chapter 4 on page 8 ). 4 x 12 w at 2 ? , 14.4 v 4 x 10 w at 4 ? , 17 v 4 x 9 w at 2 ? , 12 v 4 x 5 w at 4 ? , 12 v suggested applications: 0.22 f diagnostics 2200 f d04au1555b 10 f 10k st-by in1 0.22 f in2 0.22 f in3 0.22 f in4 p-gnd s-gnd 47 f 1000 f 100nf v s 2200 f 2200 f 2200 f out1 out2 out3 out4 7 4 5 12 11 6 13 3 1 2 15 14 10 9 8 1 470 f 2 14 470 f 15 2 x 9 w at 8 ? , 12 v 2 x 18 w at 4 ? , 12 v 2 x 13 w at 8 ? , 14 v suggested applications: 2 x 26 w at 8 ? , 14 v 2 x 15 w at 8 ? , 16 v 0.47 f 1 diagnostics 4 7 d95au1600 10 f 10k st-by in l 0.47 f 5 11 in r 12 47 f 6 13 1000 f 100nf 3 v s 2 14 15 out l 89 10 out r
standard applications circuits STA540SAN 12/26 doc id 18306 rev 1 figure 10. stereo bridge a dedicated evaluation board is available for this application (see chapter 4 on page 8 ). 2 x 9 w into 2 ? + 1 x 18 w into 4 ? , 12 v 2 x 12 w into 2 ? + 1 x 26 w into 4 ? , 14.4 v 2 x 8 w into 4 ? + 1 x 16 w into 8 ? , 16 v suggested applications: 0.22 f 1 diagnostics 4 7 d05au1601 10 f 10k st-by in l 0.47 f 5 in bridge 11 47 f 6 13 1000 f 100nf 3 v s 2 14 15 out l 89 10 out bridge 12 0.22 f in r out r 2200 f 2200 f
STA540SAN electrical characteristics curves doc id 18306 rev 1 13/26 6 electrical characteristics curves figure 11. quiescent drain current vs supply voltage (single-ended and bridge) figure 12. quiescent output voltage vs supply voltage (single-ended and bridge) figure 13. output power vs supply voltage figure 14. distortion vs output power figure 15. output power vs supply voltage figure 16. distortion vs output power 0 20 2 4 6 8 10 12 14 16 18 po(w) +8 +22 +10+12+14+16+18+20 vs(v) s.e. rl=4ohm f=1khz t.h.d=1% t.h.d=10% 0 20 2 4 6 8 10 12 14 16 18 po(w) +8 +22 +10+12+14+16+18+20 vs(v) s.e. rl=4ohm f=1khz t.h.d=1% t.h.d=10%
electrical characteristics curves STA540SAN 14/26 doc id 18306 rev 1 figure 17. output power vs supply voltage figure 18. distortion vs output power figure 19. output power vs supply voltage figure 20. crosstalk vs frequency 0 12 1 2 3 4 5 6 7 8 9 10 11 +8 +24 +10 +12 +14 +16 +18 +20 +22 po(w) vs(v) t.h.d=1% t.h.d=10% s.e. rl=8ohm f=1khz 0 12 1 2 3 4 5 6 7 8 9 10 11 +8 +24 +10 +12 +14 +16 +18 +20 +22 po(w) vs(v) t.h.d=1% t.h.d=10% s.e. rl=8ohm f=1khz figure 21. output power vs voltage figure 22. standby attenuation vs threshold voltage 0 35 2.5 5 7.5 10 12.5 15 17.5 20 22.5 25 27.5 30 32.5 +8 +22 +10 +12 +14 +16 +18 +20 btl rl=8ohm f=1khz po(w) vs(v) t.h.d=1% t.h.d=10% 0 35 2.5 5 7.5 10 12.5 15 17.5 20 22.5 25 27.5 30 32.5 +8 +22 +10 +12 +14 +16 +18 +20 btl rl=8ohm f=1khz po(w) vs(v) t.h.d=1% t.h.d=10%
STA540SAN electrical characteristics curves doc id 18306 rev 1 15/26 figure 23. supply voltage rejection vs frequency figure 24. total power dissipation and efficiency vs output power figure 25. total power dissipation and efficiency vs output power
thermal information STA540SAN 16/26 doc id 18306 rev 1 7 thermal information in order to avoid the thermal protection intervention that is placed at t j =150 c (thermal muting) or t j =160 c (thermal shutdown), it is important to design the heatsink r th (c/w) value correctly. the parameters that influence the design are: z maximum dissipated power for the device (p dmax ) z maximum thermal resistance junction to case (r th_j-case ) z maximum ambient temperature t amb_max there is also an additional term that depends on the quiescent current, iq, but this is negligible in this case. example 1: 4-channel single-ended amplifier v cc =14.4 v, r l = 4 ? x 4 channels, r th_j-case = 2.5 c/w, t amb_max = 50 c, p out = 4 x 7 w the required thermal resistance for the heatsink is example 2: 2-channel single-ended plus 1-channel (btl) amplifier v cc = 14.4 v, r l = 2 x 2 ? (se) + 1 x 4 ? (btl), p out = 2 x 12 w + 1 x 26 w the required thermal resistance for the heatsink is design notes on examples 1 and 2 the values found give a heatsink that is de signed to sustain the maximum dissipated power. but, as explained in the applications note an1965, the heatsink can be smaller when a realistic application is considered where a musical program is used. when the average listening power concept is considered, the dissipated power is about 40% less than the p dmax . therefore, in examples 1 and 2, the resulting average dissipated power is reduced as follows: ? example 1: 10.5 w - 40% = 6.3 w giving r th_c-amb = 13.4 c/w ? example 2: 21 w - 40% = 12.6 w giving r th_c-amb = 5.4 c/w figure 26 below shows the power derating curve for the device. p dmax nchannel v cc 2 2 2 r l ----------------- - 42.62 10.5w = ? = ? = "" r th_c-amb 150 t amb_max ? p dmax ------------------- -------------------- r th_j-case 150 50 ? 10.5 ------------ ---------- 2.5 7 c/w = ? = ? = p dmax 2 v cc 2 2 2 r l ----------------- - 2v cc 2 2 r l ---------------- - 2 5.25 10.5 21w = + ? = + ? = "" r th_c-amb 150 t amb_max ? p dmax --------------- -------------- ---------- r th_j-case 150 50 ? 21 ----------- ----------- 2.5 2.2 c/w = ? = ? =
STA540SAN thermal information doc id 18306 rev 1 17/26 figure 26. power derating curve 0 5 10 15 20 25 30 0 20 40 60 80 100 120 140 160 1) infinite 2) 3.5c/w 3) 5c/w 4) 7c/w 4 1 3 2 pd(w) tamb(c) 0 5 10 15 20 25 30 0 20 40 60 80 100 120 140 160 1) infinite 2) 3.5c/w 3) 5c/w 4) 7c/w 4 1 3 2 pd(w) tamb(c)
general structure STA540SAN 18/26 doc id 18306 rev 1 8 general structure 8.1 high application flexibility the availability of four independent cha nnels makes it possible to accomplish several kinds of applications ranging from four-speaker stereo (f/r) to two-speaker bridge solutions. when working with single-ended conditions, the polarity of the speakers driven by the inverting amplifier must be reversed with respect to those driven by non-inverting channels. this is to avoid phase irregularities causing sound alterations especially during the reproduction of low frequencies. 8.2 easy single-ended to bridge transition the change from single-ended to bridge configurations is made simple by means of a short circuit across the inputs (resulting in no need of additional external components). 8.3 internally fixed gain the gain is internally fixed to 20 db in single-ended mode and 26 db in bridge mode. the advantages of this design choice are in terms of: z components and space saving z output noise, supply voltage rejection and distortion optimization. 8.4 silent turn on/off an d muting/standby functions standby mode can be easily activated by means of a cmos logic level applied to pin 7 through a rc filter. under standby conditions, the device is turned off completely (supply current = 1 ma typical, output attenuation = 80 db minimum). all on/off operations are virtually pop-free. furthermore, at turn-on the device stays in mute condition for a time determined by the value assigned to the svr capacitor. in mute mode, the device outputs are insensitive to any kind of signal that may be present at the input terminals. in other words, any transients coming from previous stages produce no unpleasant acoustic effects at the speakers. 8.5 standby driving (pin 7) some precautions need to be taken when defining standby driving networks. pin 7 cannot be directly driven by a voltage source havi ng a current capability higher than 5 ma. in practical cases a series resistance must be inserted, giving it the double purpose of limiting the current at pin 7 and smoothing down the standby on/off transitions. and, when done in combination with a capacitor, prevents output pop. a capacitor of at least 100 nf from pin 7 to s_gnd, with no resistance in between, is necessary to ensure correct turn-on.
STA540SAN general structure doc id 18306 rev 1 19/26 8.6 output stage the fully complementary output stage is possible with the power icv pnp component. this novel design is based on the connection shown in figure 27 and allows the full exploitation of its capabilities. the clear advantages this new approach has over classical output stages are described in the following sections. 8.6.1 rail-to-rail output voltage sw ing with no need of bootstrap capacitors the output swing is lim ited only by the v cesat of the output transistors, which are in the range of 0.3 ? (r sat ) each. classical solutions adopting composite pnp-npn for the upper output stage have higher saturation loss on the top side of the waveform. this unbalanced saturation causes a significant power reduction. the only way to recover power includes the addition of expensive bootstrap capacitors. 8.6.2 absolute stability wit hout any external compensation with reference to the circuit shown in figure 27 , the gain v out /v in is greater than unity, that is, approximately 1+r2/r1. the dc output (v cc /2) is fixed by an aux iliary amplifier common to all the channels. by controlling the amount of this local feedback, it is possible to force the loop gain (a* ) to less than unity at a frequency where the phase shift is 180 . this means that the output buffer is intrinsically stable and not prone to oscillation. the above feature has been achieved even though there is very low closed-loop gain of the amplifier. this is in contrast with the classical pn p-npn stage where the solution adopted for reducing the gain at high frequencies makes use of external rc networks, namely the boucherot cells. figure 27. the new output stage
general structure STA540SAN 20/26 doc id 18306 rev 1 8.7 short-circuit protection reliable and safe operation in the presence of all kinds of short circuits involving the outputs is assured by built-in protection. additionally, a soft short-condition is signalled out (to the ac/dc short circuit to gnd, to vs, and across the speaker) during the turn-on phase to ensure correct operation of the device and the speakers. this particular kind of protection acts in such a way as to prevent the device being turned on (by st_by) when a resist ive path (less than 16 ? ) is present between the output and gnd. it is important to have the external current source driving the st_by pin limited to 5 ma. this is because the associated circuitry is normally disabled with currents >5 ma. this extra function becomes particularly attrac tive when, in the single-ended configuration, one capacitor is shared between two outputs as shown in figure 28 . figure 28. sharing a capacitor if the output capacitor c out is shorted for any reason, the loudspeaker is not damaged. 8.7.1 diagnostic facilities (pin 10) the STA540SAN is equipped with diagnostic circuitry that is able to detect the following events: z clipping in the output signal z thermal shutdown z output fault: ? short to gnd ? short to vs ? soft short at turn on the information is available across an open collector output (pin 10) through a current sinking when the event is detected. figure 29. clipping detection waveforms a current sinking at pin 10 is provided when a certain distortion level is reached at each output. this function initia tes a gain-compression facility whenever the amplifier is overdriven.
STA540SAN general structure doc id 18306 rev 1 21/26 8.7.2 thermal shutdown with the thermal shutdown feature, the output (pin 10) signals the proximity of the junction temperature to the shutdown threshold. typically, current sinking at pin 10 starts at approximately 10 c before the shutdown threshold is reached. figure 30. output fault waveforms figure 31. fault waveforms 10 10 soft short out to vs short fault detection correct turn-on out to gnd short t t t st_by pin voltage 2v output waveform vpin 10 check at turn-on (test phase) short to gnd or to vs d05au1603
general structure STA540SAN 22/26 doc id 18306 rev 1 8.8 handling of the di agnostic information as different diagnostic information is available at the same pin (clipping detection, output fault, thermal proximity), the signal must be handled correctly in order to discriminate the event. this could be done by taking into account the different timing of the diagnostic output during each case. normally, clip-detector signalling under faulty conditions produces a low level at pin 10. based on this assumption, an interface circuitry to differentiate the information is shown in figure 33 . figure 32. waveforms figure 33. interface circuit diagram t t t st_by pin voltage vs output waveform vpin 10 waveform short to gnd or to vs d05au1604_bc clipping thermal proximity 10
STA540SAN general structure doc id 18306 rev 1 23/26 8.9 pcb-layout grounding (general rules) the device has two distinct ground leads, p_gnd (power ground) and s_gnd (signal ground) which are practically disconnected from each other at chip level. correct operation requires that p_gnd and s_gnd leads be connected together on the pcb layout by means of reasonably low-resistance tracks. for the pcb ground configuration a star-like arrangement, where the center is represented by the supply-filtering electrolytic capacitor ground, is recommended. in such context, at least two separate paths must be provided; one for power ground and one for signal ground. the correct ground assignments are as follows: z standby capacitor (pin 7, or any other standby driving networks): on signal ground z svr capacitor (pin 6): on signal ground an d to be placed as close as possible to the device z input signal ground (from active/passive si gnal processor stages): on signal ground z supply filtering capacitors (pins 3 and 13): on power ground. the negative terminal of the electrolytic capacitor must be directly tied to the battery negative line and this should represent the starting point for all the ground paths. 8.10 mute function if the mute function is required, it can be accessed on svr (pin 6) as shown in figure 34 . figure 34. components for layout v s = 10 to 16 v, v svr : mute off 0.6 to 0.8, mute on 0.2 v using a different value for r1 than the suggested 3.3 k ? , results in two different situations: z r1 > 3.3 k ? : ? pop noise improved ? lower mute attenuation z r1 < 3.3 k ? : ? pop noise degradation ? higher mute attenuation 0.22 f 1 diagnostics 4 7 d06au1632_bc 10 f 10k st-by in l 0.47 f 5 in bridge 12 470 f 6 13 1000 f 100nf 3 v s 2 15 14 out l 8 9 10 out bridge 11 0.22 f in r out r 2200 f 2200 f r1 3.3k r2 10k mute 5v 0 play
package mechanical data STA540SAN 24/26 doc id 18306 rev 1 9 package mechanical data in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com. ecopack ? is an st trademark. figure 35. mechanical data and package dimensions outline and mechanical data 0044538 g dim. mm inch min. typ. max. min. typ. max. a3.20.126 b 1.05 0.041 c 0.15 0.006 d 1.50 0.061 e 0.49 0.55 0.019 0.022 f 0.67 0.73 0.026 0.029 g 1.14 1.27 1.4 0.045 0.050 0.055 g1 17.57 17.78 17.91 0.692 0.700 0.705 h1 12 0.480 h2 18.6 0.732 h3 19.85 0.781 l 17.9 0.704 l1 14.55 0.572 l2 10.7 11 11.2 0.421 0.433 0.441 l3 5.5 0.217 m 2.54 0.100 m1 2.54 0.100 clipwatt15 weight: 1.92gr
STA540SAN revision history doc id 18306 rev 1 25/26 10 revision history table 7. document revision history date revision changes 16-dec-2010 1 initial release
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